M. Higashitani

Low Cost ‘On Pitch Select Gate’ (OPS) Technology for 3D Flash Memory

Amrit Prakash, Xiaochen Zhu, Guirong Liang, M. Higashitani et autres

Contrary to the general perception of 3D flash memory technology nodes being defined by the vertical stacking of word line layers, we, for the first time, present an unconventional approach employed in the mass production of BiCS FLASH™ generation 8 3D flash …

Past and Future of 3D Flash

J. Alsmeier, M. Higashitani, Sunhom Steve Paak, Siva Sivaram

It has been several years since 3D Flash has displaced 2D Flash as the mainstream technology for NAND devices. The transition from 2D to 3D will continue to shape the industry for many years to come particularly due to the switch from …

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A 130.7-$\hbox{mm}^{2}$ 2-Layer 32-Gb ReRAM Memory Device in 24-nm Technology

Tz-yi Liu, Tian Hong Yan, R.E. Scheuerlein, Yingchang Chen et autres

A 32-Gb ReRAM test chip has been developed in a 24-nm process, with a diode as the selection device and metal oxide as the switching element. The memory array is constructed with cross-point architecture to allow multiple memory layers stacked above the …

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A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology

Tz-yi Liu, Tian Hong Yan, R.E. Scheuerlein, Yingchang Chen et autres

ReRAM has been considered as one of the potential technologies for the next-generation nonvolatile memory, given its fast access speed, high reliability, and multi-level capability. Multiple-layered architectures have been used for several megabit test-chips and memory macros [1-3]. This paper presents a …

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128Gb 3-Bit Per Cell NAND Flash Memory on 19nm Technology with 18MB/s Write Rate

Teruhiko Kamei, Yan Li, Seungpil Lee, Ken Oowada et autres

128Gb 3b/cell NAND flash memory in 19nm technology with 18MB/s write rate and 400Mb/s toggle mode

Yan Li, Seungpil Lee, Ken Oowada, Hao Nguyen et autres

Since the first 3b/cell (X3) NAND flash memory paper in ISSCC 2008 [1], market demand for applications using high-density low-cost flash memory such as tablets, smart phones, and SSDs, has increased rapidly. Various electronic devices already use X3 NAND. The use of …

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A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface

Noboru Shibata, K. Kanda, Toshiki Hisada, K. Isobe et autres

NAND flash memory is widely used in digital cameras, USB devices, cell phones, camcorders and solid-state drives. Continuous lowering of bit cost, increasing flash-memory-die densities and improving performance have helped to expand flash markets. Recently, there are two different directions to meet …

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A 151-mm$^{2}$ 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology

Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami et autres

A 64-Gb MLC (2 bit/cell) NAND flash memory with the highest memory density to date as an MLC flash memory, has been successfully developed. To decrease the chip size, 2-physical-plane configuration with 16 KB wordline-length, a new bit-line hook-up architecture, and a …

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A 151mm2 64Gb MLC NAND flash memory in 24nm CMOS technology

Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami et autres

NAND flash memories are now indispensable for our modern lives. The application range of the storage memory devices began with digital still cameras and has been extended to USB memories, memory cards, MP3 players, cell phones including smart phones, netbooks, and so …

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A 7.8MB/s 64Gb 4bit/Cell NAND Flash Memory in 43nm CMOS

Mareki Honma, Cuong Trinh, Noboru Shibata, Takumi Nakano et autres

7.8MB/sを実現する64Gb 4ビット/セル43nm NANDフラッシュメモリー

充祥 本間, Cuong Trinh, 昇 柴田, 威 中野 et autres

A 5.6MB/s 64Gb 4b/Cell NAND Flash memory in 43nm CMOS

Cuong Trinh, Noboru Shibata, Takumi Nakano, M. Ogawa et autres

Today NAND Flash memory is used for data and code storage in digital cameras, USB devices, cell phones, camcorders, and solid-state disk drives. Figure 13.6.1 shows the memory-density trend since 2003. To satisfy the market demand for lower cost per bit and …

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