Accès ouvert
2026
preprint
OpenAlex
Gyujun Jeong, Junmo Lee, Sungwon Cho, Woohyun Hwang et autres
Experimental TCAD calibration is essential for predictive technology modeling of emerging oxide semiconductor transistors. However, it remains time-consuming and expert dependent because of model ambiguity. Multiple physical models and parameter sets can reproduce the same measured transfer characteristics, while local fitting alone …
Accès ouvert
2026
article
OpenAlex
권시현, Junil Kim, Geuntae Park, Minseok Kim et autres
ABSTRACT Wide‐bandgap amorphous oxide semiconductors (AOSs), particularly indium‐gallium‐zinc‐oxide (IGZO), offer ultralow off‐current and back‐end‐of‐line compatibility, making them attractive for advanced dynamic random access memory (DRAM). In capacitor‐less two‐transistor (2T0C) DRAM, dual‐gate (DG) a‐IGZO TFTs are promising read transistors, but achieving a stable …
kr
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Accès ouvert
2026
preprint
OpenAlex
Lance Fernandes, Yu-Hsin Kuo, Chengyang Zhang, Priyankka Ravikumar et autres
In this work, we report a systematic study of the impact of high-temperature post-capping thermal annealing on the memory characteristics of Oxide-semiconductor channel ferroelectric field-effect transistors (OS-FeFETs). Using an identical engineered ferroelectric gate stack 8nm Hf0.5Zr0.5O2 (HZO) / 3 nm Al2O3 / …
Accès ouvert
2026
article
OpenAlex
Lance Fernandes, Yu-Hsin Kuo, Chengyang Zhang, Priyankka Ravikumar et autres
In this work, we report a systematic study of the impact of high-temperature post-capping thermal annealing on the memory characteristics of Oxide-semiconductor channel ferroelectric field-effect transistors (OS-FeFETs). Using an identical engineered ferroelectric gate stack—8nm Hf0.5Zr0.5O2(HZO) / 3 nm Al2O3/ 8 nm HZO …
us, kr
(code pays fourni par la source)
Accès ouvert
2026
conference-paper
OpenAlex
Lance Fernandes, Minji Shon, Prasanna Venkatesan, Priyankka Ravikumar et autres
In this work, we demonstrate for the first time that laminated Fe-FETs for Fe-NAND exhibit a distinct behavior: despite the common expectation that higher-$k$channel-side interlayers (C-ILs) enhance reliability by lowering the equivalent oxide thickness (EOT), lower-$k$C-ILs instead deliver superior memory-window (MW), retention, …
us, kr, it
(code pays fourni par la source)
Accès ouvert
2026
preprint
OpenAlex
Ranie Jeyakumar, Prasanna Venkatesan, Lance Fernandes, Salma Soliman et autres
Dielectric inserts are widely used to expand the memory window (MW) in ferroelectric FETs (FeFETs) for vertical NAND applications, with prior efforts focused primarily on material selection and stack positioning. Here, we demonstrate that the ALD oxidant used for the Al2O3 interlayer …
Accès ouvert
2026
preprint
OpenAlex
Ranie Jeyakumar, Prasanna Venkatesan, Lance Fernandes, Salma Soliman et autres
Dielectric inserts are widely used to expand the memory window (MW) in ferroelectric FETs (FeFETs) for vertical NAND applications, with prior efforts focused primarily on material selection and stack positioning. Here, we demonstrate that the ALD oxidant used for the Al2O3 interlayer …
us
(code pays fourni par la source)
Accès ouvert
2026
other
OpenAlex
IEEE International Symposium on Reliability Physics 2026, Suman Datta, Lance Fernandes, Woohyun Hwang et autres
We demonstrate that laminated FeFETs for Fe-NAND exhibit a distinct channel-side interlayer (C-IL) behavior: low-k SiO2 delivers superior memory window, retention, and pass-disturb reliability compared to high-k Al2O3 and HfO2. Experiments and TCAD reveal that although high-k C-ILs lower EOT, their higher …
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(code pays fourni par la source)
Accès ouvert
2026
preprint
OpenAlex
Gyujun Jeong, Sungwon Cho, Minji Shon, Nam Hoon Kim et autres
Ferroelectric field-effect transistors (FeFET)-based vertical NAND (Fe-VNAND) has emerged as a promising candidate to overcome z-scaling limitations with lower programming voltages. However, the data retention of 3D Fe-VNAND is hindered by the complex interaction between charge detrapping and ferroelectric depolarization. Developing optimized …
us, kr
(code pays fourni par la source)
Accès ouvert
2026
preprint
OpenAlex
Gyujun Jeong, Sungwon Cho, Minji Shon, Nam Hoon Kim et autres
Ferroelectric field-effect transistors (FeFET)-based vertical NAND (Fe-VNAND) has emerged as a promising candidate to overcome z-scaling limitations with lower programming voltages. However, the data retention of 3D Fe-VNAND is hindered by the complex interaction between charge detrapping and ferroelectric depolarization. Developing optimized …
us, kr
(code pays fourni par la source)
2025
conference-paper
OpenAlex
Minji Shon, Chinsung Park, Prasanna Venkatesan Ravindran, Lance Fernandes et autres
Ferroelectric field-effect transistors (FeFETs)-based vertical NAND (Fe-VNAND) has emerged as a promising solution to z-scaling limitations of conventional charge trap layer (CTL)-based VNAND (Fig. 1) with reduced programming voltage (from $\gt30 \mathrm{~V}$ to $(\lt)15 \mathrm{~V}$) [1]. Band engineered FeFETs are actively being …
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(code pays fourni par la source)
Accès ouvert
2024
article
OpenAlex
Ji Yeon Kim, Woohyun Hwang, Seo Yeon Han, Ye Seul Jung et autres
Abstract With the emergence of electromechanical devices, considerable efforts have been devoted to improving the piezoelectricity of 2D materials. Herein, an anion‐doping approach is proposed as an effective way to enhance the piezoelectricity of α‐In2Se3 nanosheets, which has a rare asymmetric structure …
kr
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