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Profil bibliographique

Faaiq Waqar

Informations fournies par OpenAlex. Research Africa ne déduit ni nationalité, ni poste, ni coordonnées personnelles.

29Publications signalées
96Citations signalées
1Affiliations récentes

Les institutions déclarées

Les domaines associés

Semiconductor materials and devicesFerroelectric and Negative Capacitance DevicesAdvanced Memory and Neural ComputingAdvancements in Semiconductor Devices and Circuit DesignParallel Computing and Optimization Techniques

Les publications récentes

2026 article OpenAlex

Monolithic 3D Voltage Converter Enabled Fine-Grain Dynamic Voltage Frequency Scaling in Many-Core Processors

Jungyoun Kwak, Faaiq Waqar, Shimeng Yu

The continued scaling of CMOS technology amplifies the challenges of delivering power efficiently to many-core processors. Dynamic voltage and frequency scaling (DVFS) offers substantial energy savings, but its effectiveness depends on the voltage settling time, efficiency, and integration cost of the underlying …

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0 citations IEEE Transactions on Computers
2026 article OpenAlex

Hardware Acceleration of Kolmogorov–Arnold Network (KAN) in Large-Scale Systems

Wei-Hsing Huang, Jianwei Jia, Yuyao Kong, Faaiq Waqar et autres

Recent developments have introduced Kolmogorov– Arnold networks (KANs), an innovative architectural paradigm capable of replicating conventional deep neural network (DNN) capabilities while utilizing significantly reduced parameter counts through the employment of parameterized B-spline functions incorporating trainable coefficients. Nevertheless, the B-spline functional components …

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1 citation IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2026 conference-paper OpenAlex

Radiation Reliability of BEOL Compatible Ga-Doped Indium Oxide MOSFETs for eDRAM Applications

Sharadindu Gopal Kirtania, Chengyang Zhang, Stuart E. Wodzro, Faaiq Waqar et autres

This work addresses a key bottleneck in radiationhardened computing: achieving high-density embedded memory in monolithically stacked (M3D) systems without relying on areainefficient SRAM or radiation-sensitive scaled Si access devices. We evaluate back-end-of-the-line (BEOL) compatible Ga-doped indium oxide (IGO) MOSFETs as access transistors …

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1 citation
Accès ouvert 2026 other OpenAlex

Radiation Reliability of BEOL Compatible Ga-doped Indium Oxide MOSFETs for eDRAM Applications

IEEE International Symposium on Reliability Physics 2026, Dyutimoy Chakraborty, Suman Datta, Asif Khan et autres

This work addresses a key bottleneck in radiation-hardened computing: achieving high-density embedded memory in monolithically stacked (M3D) systems without relying on area-inefficient SRAM or radiation-sensitive scaled Si access devices. We evaluate back-end-of-the-line (BEOL) compatible Ga-doped indium oxide (IGO) MOSFETs as access transistors …

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0 citations Underline Science Inc.
2026 article OpenAlex

Architecting Long-Context Large Language Model Acceleration With Packing–Prefetch Scheduler and Ultralarge Capacity On-Chip Memories

Minah Lee, Faaiq Waqar, Hanchen Yang, Muhammed Ahosan Ul Karim et autres

Long-context Large Language Model (LLM) inference faces increasing compute bottlenecks as attention calculations scale with context length, primarily due to the growing KV-cache transfer overhead that saturates High Bandwidth Memory (HBM). While prefetching techniques mitigate cache misses by fetching KV data in …

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1 citation IEEE Micro
2026 article OpenAlex

Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache

Faaiq Waqar, Jungyoun Kwak, Junmo Lee, Omkar Phadke et autres

The Last Level Cache (LLC) is the processor’s critical bridge between on-chip and off-chip memory levels - optimized for high density, high bandwidth, and low operation energy. To date, high-density (HD) SRAM has been the conventional device of choice; however, with the …

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6 citations IEEE Transactions on Computers
2026 article OpenAlex

Asymmetric Underlap–Overlap 2T Gain Cell Enabling Voltage-Sensing Readout With Minimized Capacitive Coupling

Jay Sonawane, Sunbin Deng, Chengyang Zhang, Omkar Phadke et autres

This work introduces an asymmetric structure for a 2-transistor gain cell realized by a write transistor with gate-to-source/drain underlap and an overlapped read transistor. This asymmetric topology enables voltage sensing while substantially minimizing the word line to storage node capacitive coupling. Utilization …

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2 citations IEEE Electron Device Letters

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