Geum-Jong Bae

24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit

Taejoong Song, Woojin Rim, Hoonki Kim, Keun Hwi Cho et autres

Advanced technologies help to improve SRAM performance via recent transistor breakthroughs [1], which allow SRAM designers to focus on handling metal resistance by alleviating device performance impediments. Since SRAM margins are more vulnerable to the increasing metal resistance, due to smaller critical …

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3nm GAA Technology featuring Multi-Bridge-Channel FET for Low Power and High Performance Applications

Geum-Jong Bae, Dong-il Bae, Mingu Kang, S. M. Hwang et autres

As the most feasible solution beyond FinFET technology, a gate-all-around Multi-Bridge-Channel MOSFET (MBCFET) technology is successfully demonstrated including a fully working high density SRAM. MBCFETs are fabricated using 90% or more of FinFET processes with only a few revised masks, allowing easy …

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A novel tensile Si (n) and compressive SiGe (p) dual-channel CMOS FinFET co-integration scheme for 5nm logic applications and beyond

Dong-il Bae, Geum-Jong Bae, Krishna Kumar Bhuwalka, Seunghun Lee et autres

A novel tensile Si (tSi) and compressive SiGe (cSiGe) dual-channel FinFET CMOS co-integration scheme, aimed at logic applications for the 5nm technology node and beyond, is demonstrated for the first time, showing electrical performance benefits and excellent co-integration feasibility. A Strain-Relaxed SiGe …

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Acceptor-like trap effect on negative-bias temperature instability (NBTI) of SiGe pMOSFETs on SRB

Guangfan Jiao, M. Toledano-Luque, Kab-Jin Nam, Nakanishi Toshiro et autres

In this work, the oxide electric field (Eox) reduction caused by negatively charged traps is proposed to explain the robustness of SiGe pMOSFETs to negative gate bias temperature instability (NBTI) stress. The high density of negatively charged acceptor-like traps close to the …

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Retention Mechanism of Localized Silicon–Oxide–Nitride–Oxide–Silicon Embedded NOR Device

Jaewoong Hyun, Younseok Jeong, Heesoon Chae, Sunae Seo et autres

Reliability studies of localized oxide–nitride–oxide memory (LONOM) devices are presented. The observed reduction in channel threshold voltage as a result of the retention charge loss of a programmed cell is demonstrated in terms of vertical leakage paths. Despite the apparent controversy of …

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Self-Amorphizing Gas Cluster Ion Beam Technology and Combination with Laser Spike Anneal for Highly Scaled Source Drain Junction

Ho Lee, Hwa Sung Rhee, T. Ueno, Myung Sun Kim et autres

High energy borane (B2H6) gas cluster ion beam (GCIB) successfully enables a sub-10 nm box-shaped dopant profile without channeling tail, and steep gradient (2.5 nm/dec) in lateral direction. pFET using GCIB source/drain extension shows superior suppression of short channel effects and reduces …

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Self-Amorphizing Gas Cluster Ion Beam Technology and Combination with Laser Spike Anneal for Highly Scaled Source Drain Junction

Kyoung Ho Lee, Hwa Sung Rhee, T. Ueno, Myung Sun Kim et autres

High energy borane (B2H6) gas cluster ion beam (GCIB) successfully enables a sub-10 nm box-shaped dopant profile without channeling tail, and steep gradient (2.5 nm/dec) in lateral direction. pFET using GCIB source/drain extension shows superior suppression of short channel effects and reduces …

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Self-Amorphizing GasCluster IonBeamTechnology andCombination with LaserSpike AnnealforHighly Scaled Source DrainJunction

Tetsuji Ueno, Lucia Feng, Wesley Skinner, Geum-Jong Bae et autres

Highenergy borane (B2H6) gascluster ionbeam (GCIB) successfully enables asub-1 Onmbox-shaped dopant profile without channeling tail, andsteep gradient (2.5nm/dec) inlateral direction. pFETusing GCIB source/drain extension showssuperior suppression ofshort channel effects andreduces the dependency of drivecurrent on gateoverlap capacitance variation forscaled devices. Moreover, the …

The drive currents improvement of FDSOI MOSFETs with undoped Si epitaxial channel and elevated source/drain structure

Sang-Su Kim, T.H. Choe, Hwasung Rhee, Geum-Jong Bae et autres

Fully-depleted silicon-on-insulator (FDSOI) MOSFETs are very attractive for low-voltage applications due to ideal subthreshold slope, short channel effect (SCE) immunity and reduced junction capacitance compared to bulk silicon MOSFETs. However, the channel mobility degradation due to higher channel doping for threshold voltage …

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Highly Stable Microprocessor Using SiGe Inserted SOI MOSFET

Hee-Sung Kang, Young-Wug Kim, Kong-Soo Chung, Ki-Mun Nam et autres

Improvement of Photo-Misalignment in Patterned Wafer Bonding Process for Silicon-on-Insulator Device

Ki-Hong Lee, Giho Cha, Geum-Jong Bae, Kyung-Wook Lee et autres

We have found that the photo-misalignment problem in patterned and bonded silicon-on-insulator (PBSOI) was closely related to the bonding process. We examined the stress effect on photo-misalignment using a vacuum bonding system. Photo-misalignment was critically dependent on the distance between bonding plates. …

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