2026
conference-paper
OpenAlex
Qingchen Zhai, Hao Yu, Chen Bai, Charles Young et autres
Formal verification is a major bottleneck in integrated circuit (IC) design due to the inefficiency and inaccuracy of manual assertion writing and the limitations of existing automation approaches. While large language models (LLMs) offer a promising alternative for assertion generation, their effectiveness …
cn, hk
(code pays fourni par la source)
2026
conference-paper
OpenAlex
Xin Fan, Chen Bai, Xin Yang, Zhenhua Zhu et autres
Large language models (LLMs) are foundational to artificial general intelligence (AGI), while imposing stringent hardware demands in computational power and memory bandwidth. To meet these demands, recent advances in hybrid bonding offer new opportunities through high-bandwidth, low-latency logic-memory 3D integration. Due to …
hk, cn
(code pays fourni par la source)
Accès ouvert
2026
conference-paper
OpenAlex
Ceyu Xu, Xiangfeng Sun, Weihang Li, Chen Bai et autres
Hardware data prefetching is a critical technique for mitigating memory latency in modern processors. While sophisticated hardware prefetching algorithms exist, their exclusive reliance on runtime information limits their ability to adapt quickly and comprehend broader program context. Our key insight is that …
hk, us
(code pays fourni par la source)
2025
article
OpenAlex
Peng Xu, Su Zheng, Yuyang Ye, Chen Bai et autres
Electronic design automation (EDA) tools are critical in the very large scale integration (VLSI) flow. To address the challenges posed by the extensive search space and intricate feature interactions, statistical and machine-learning methods have been employed. These methods aim to model tool …
hk, cn, se
(code pays fourni par la source)
2025
conference-paper
OpenAlex
Chen Bai, Xin Fan, Zhenhua Zhu, Wei Zhang et autres
Large language models (LLMs) show viability for artificial general intelligence (AGI) with high computing power and memory bandwidth demands. While existing LLM accelerators leverage high-bandwidth memory (HBM) and 2.5D packaging to address the challenge, emerging hybrid bonding techniques unlock new opportunities for …
hk
(code pays fourni par la source)
2025
article
OpenAlex
Lancheng Zou, Shuo Yin, Mingjun Li, Mingzi Wang et autres
The scale of large language models (LLMs) has steadily increased over time, leading to enhanced performance in multi-modal understanding and complex reasoning, but with significant execution overhead on hardware. Quantization is a promising approach to reduce computation and memory overhead for LLM …
hk
(code pays fourni par la source)
2025
conference-paper
OpenAlex
Hongduo Liu, Chen Bai, Peng Xu, Lihao Yin et autres
Large Language Models (LLMs) have revolutionized language tasks but pose significant deployment challenges due to their substantial computational demands during inference. The hardware configurations of existing LLM serving systems do not optimize for the different computational and bandwidth needs of the prefill …
hk, gb
(code pays fourni par la source)
Accès ouvert
2025
article
OpenAlex
Chen Bai, Yuxuan Zhao, Ziyue Zheng, Yangdi Lyu et autres
Verification is critical in ensuring the reliable operation of modern, complex computing systems. However, as processor designs become increasingly sophisticated, conventional static verification techniques struggle to generate high-quality test sequences that achieve comprehensive coverage. Dynamic simulation-based approaches, which leverage coverage-driven objectives, can …
hk, cn, gb
(code pays fourni par la source)
Accès ouvert
2025
article
OpenAlex
Yuan Pu, Tinghuan Chen, Zhuolun He, Chen Bai et autres
This article proposes$\textsf {IncreMacro}$, a novel approach for macro placement refinement in the context of integrated circuit (IC) design. The suggested approach iteratively and incrementally optimizes the placement of macros in order to enhance IC layout routability and timing performance. To achieve …
hk, cn
(code pays fourni par la source)
Accès ouvert
2024
conference-paper
OpenAlex
Donger Luo, Chen Bai, Bei Yu, Hao Geng et autres
In the tide of explosive development in artificial intelligence (AI), the design of AI System-on-Chips (SoCs) is an urgently pressing issue that needs to be addressed. The application of Design Space Exploration (DSE) methods is paramount in pursuing a sound microarchitecture design …
cn, hk
(code pays fourni par la source)
Accès ouvert
2024
conference-paper
OpenAlex
Peng Xu, Su Zheng, Yuyang Ye, Chen Bai et autres
Electronic Design Automation (EDA) tools are critical in the Very Large Scale Integration (VLSI) flow. To address the challenges posed by the extensive search space and intricate feature interactions, statistical and machine-learning methods have been employed. These methods aim to model tool …
hk, cn
(code pays fourni par la source)
2024
article
OpenAlex
Wenqian Zhao, Shuo Yin, Chen Bai, Zixiao Wang et autres
Efficiently deploying deep learning (DL) algorithms on different hardware backends has become a time-consuming challenge. Achieving ultimate inference efficiency on hardware requires both algorithm-level model compression techniques, such as model quantization, and hardware-level optimization, such as operation reconfiguration and scheduling. In this …
hk
(code pays fourni par la source)