Accès ouvert
2026
preprint
OpenAlex
Mengming Li, Ceyu Xu, Qijun Zhang, Jiangnan Yu et autres
High-fanout agent workloads create a growing memory bottleneck because a single task may spawn many concurrent sandbox sessions. Yet these sandboxes are far from independent: they originate from a shared template and execute related trajectories, exposing substantial template-relative and cross-sandbox memory redundancy. …
Accès ouvert
2026
preprint
OpenAlex
Xudong Sun, Ceyu Xu, Ningzhi Ai, Zeyu Zhu et autres
Hardware prefetchers are crucial to processor performance, yet their design remains labor-intensive and expert-driven. Architects inspect execution and memory-access traces, identify patterns, translate them into online hardware heuristics, and evaluate them in simulation, often with no guarantee of improvement. Human experts cannot …
Accès ouvert
2026
preprint
OpenAlex
Wanning Zhang, Tongzhou Gu, Marco Canini, Ceyu Xu et autres
Large language model (LLM) inference is increasingly dominated by data movement across the memory hierarchy. Recent 3D-stacked cache technologies have enabled GB-scale last-level caches in modern server CPUs, making it possible to keep reusable model weights on chip and exploit cache bandwidth …
2026
conference-paper
OpenAlex
Mengming Li, Chenlu Miao, Buqing Xu, Qijun Zhang et autres
Irregular memory accesses pose challenges for effective and efficient data prefetching. While temporal prefetchers have recently shown promise for irregular memory access patterns, their effectiveness fundamentally depends on temporal address recurrence and large metadata storage. When memory addresses exhibit weak or no …
hk
(code pays fourni par la source)
2026
conference-paper
OpenAlex
Jiaao Ma, Ceyu Xu, Ning Liang, Lisa Wu Wills
us
(code pays fourni par la source)
Accès ouvert
2026
preprint
OpenAlex
Ceyu Xu, Jiangnan Yu, Yongji Wu, Yuan Xie
The quadratic complexity of attention imposes severe memory and computational bottlenecks on Large Language Model (LLM) inference. This challenge is particularly acute for emerging agentic applications that require processing multi-million token sequences. We propose STS, a sparse attention mechanism that requires no …
Accès ouvert
2026
preprint
OpenAlex
Mengming Li, Chenlu Miao, Buqing Xu, Qijun Zhang et autres
Irregular memory accesses pose challenges for effective and efficient data prefetching. While temporal prefetchers have recently shown promise for irregular memory access patterns, their effectiveness fundamentally depends on temporal address recurrence and large metadata storage. When memory addresses exhibit weak or no …
Accès ouvert
2026
preprint
OpenAlex
Mengming Li, Chenlu Miao, Buqing Xu, Qijun Zhang et autres
Irregular memory accesses pose challenges for effective and efficient data prefetching. While temporal prefetchers have recently shown promise for irregular memory access patterns, their effectiveness fundamentally depends on temporal address recurrence and large metadata storage. When memory addresses exhibit weak or no …
hk
(code pays fourni par la source)
Accès ouvert
2026
conference-paper
OpenAlex
Ceyu Xu, Xiangfeng Sun, Weihang Li, Chen Bai et autres
Hardware data prefetching is a critical technique for mitigating memory latency in modern processors. While sophisticated hardware prefetching algorithms exist, their exclusive reliance on runtime information limits their ability to adapt quickly and comprehend broader program context. Our key insight is that …
hk, us
(code pays fourni par la source)
Accès ouvert
2026
preprint
OpenAlex
Yipu Zhang, Jintao Cheng, Xingyu Liu, Zeyu Li et autres
3D reconstruction and view synthesis are fundamental to AR/VR, robotics, and digital twins. The Visual Geometry Grounded Transformer (VGGT) enables strong feed-forward 3D reconstruction while its billion-parameter scale limits on-device deployment. LLM-oriented quantization methods fail on VGGT due to saturated activation channels …
2026
article
OpenAlex
An Zhong, Hanzhi Hu, Zirui Ma, Mengzhu Li et autres
Most widely deployed ISAs for general-purpose processors expose a centralized register file and instruction-granular control flow, forcing modern CPUs to rely on complex microarchitectural mechanisms to reconcile execution with architectural state. Even in simple in-order designs, these abstractions impose back-and-forth execution overheads, …
sa, cn, hk
(code pays fourni par la source)
Accès ouvert
2025
article
OpenAlex
Ceyu Xu, Yongji Wu, X.D. Yang, Beidi Chen et autres
As the parameter size of large language models (LLMs) continues to expand, the need for a large memory footprint and high communication bandwidth have become significant bottlenecks for the training and inference of LLMs.To mitigate these bottlenecks, various tensor compression techniques have …
us, hk
(code pays fourni par la source)