Emmanuel Casseau

Clustering and Token Denoising for Faster and More Robust VLMs

Baptiste Rossigneux, I. Kucher, Vincent Lorrain, Emmanuel Casseau

Recent Visual-Language Models (VLMs) have enhanced the capabilities of pre-trained LLMs by adding vision tokens alongside text, with approaches like LLaVA showing impressive results. However, the computational burden of processing up to 576 or 729 visual tokens makes edge deployment challenging. While …

AI4DSE: Leveraging Dynamic Graph Neural Networks and Large Language Models for Optimizing High-Level Synthesis Design Space Exploration

Lei Xu, Shanshan Wang, Emmanuel Casseau, Chenglong X iao

High-Level Synthesis (HLS) Design Space Exploration (DSE) is essential for generating hardware designs that balance performance, power, and area (PPA). To optimize this process, existing works often employs message-passing neural networks (MPNNs) to predict quality of results (QoR). These predictors serve as …

cn, fr (code pays fourni par la source)

DyEKF: Dynamic Protection of Approximate NoC Communications Against Hardware Trojan Attacks

Hamza Amara, Cédric Killian, Daniel Chillet, Emmanuel Casseau

Multiprocessor System-on-Chip (MPSoC) architectures rely heavily on Network-on-Chip (NoC) for efficient inter-core communication. However, large volumes of exchanged data lead to higher latency and bandwidth usage. Approximate communication in NoCs has emerged as a promising solution to address these challenges by tolerating …

fr (code pays fourni par la source)

Intelligent4DSE: Optimizing High-Level Synthesis Design Space Exploration with Graph Neural Networks and Large Language Models

Lei Xu, Shanshan Wang, Emmanuel Casseau, Chenglong Xiao

High-Level Synthesis (HLS) Design Space Exploration (DSE) is essential for generating hardware designs that balance performance, power, and area (PPA). To optimize this process, existing works often employs message-passing neural networks (MPNNs) to predict quality of results (QoR). These predictors serve as …

Importance Resides in Activations: Fast Input-Based Nonlinearity Pruning

Baptiste Rossigneux, Vincent Lorrain, I. Kucher, Emmanuel Casseau

fr (code pays fourni par la source)

Mitigation of Hardware Trojan in NoC using Delta-Based Compression

Hamza Amara, Cédric Killian, Daniel Chillet, Emmanuel Casseau

MultiProcessor System-on-Chip (MPSoC) and Network-on-Chip (NoC) are closely linked in the design of modern computer architectures. Indeed, MPSoCs are designed to integrate multiple processing units on a single chip and take advantage of NoCs to suppport communications between these multiple processors. As …

fr (code pays fourni par la source)

On-board Payload Data Processing Combined with the Roofline Model for Hardware/Software Design

Seungah Lee, Emmanuel Casseau, Angeliki Kritikakou, Olivier Sentieys et autres

High-performance on-board payload data processing has become more interesting with the development of radiation-hardened multiprocessor System-on-chip (MPSoC). As recent space-qualified MPSoCs include Arm Central Processing Units (CPUs) and Field Programmable Gate Arrays (FPGAs), an efficient design method is required to deal with …

fr (code pays fourni par la source)

Surround the Nonlinearity: Inserting Foldable Convolutional Autoencoders to Reduce Activation Footprint

Baptiste Rossigneux, I. Kucher, Vincent Lorrain, Emmanuel Casseau

Modern deep learning architectures, while highly successful, are characterized by substantial computational and memory demands due to their large number of parameters or the storing of activations. That is why it is hard to adapt a neural network to the constraints of …

fr (code pays fourni par la source)

High-Level Synthesis-Based On-board Payload Data Processing considering the Roofline Model

Seungah Lee, Olivier Sentieys, Rubén Salvador, Julien Galizzi et autres

On-board payload data processing can be performed by developing space-qualified heterogeneous Multiprocessor System-on-Chips (MPSoCs). We present key compute-intensive payload algorithms, based on a survey with space science researchers, including the two-dimensional Fast Fourier Transform (2-D FFT). Also, we propose to perform design …

fr (code pays fourni par la source)

Algorithms with improved delay for enumerating connected induced subgraphs of a large cardinality

Shanshan Wang, Chenglong Xiao, Emmanuel Casseau

cn, fr (code pays fourni par la source)

Online fault tolerant energy-aware algorithm for CubeSats

Petr Dobiáš, Emmanuel Casseau, Oliver Sinnen

fr, nz (code pays fourni par la source)

Near-optimal energy-efficient partial-duplication task mapping of real-time parallel applications

Minyu Cui, Angeliki Kritikakou, Lei Mo, Emmanuel Casseau

fr, bd, cn (code pays fourni par la source)