C. Osborn

Monolithic Stacked FET with Stepped Channels for Future Logic Technologies

Chen Zhang, Jay W. Strane, Lijuan Zou, Suin Yun et autres

We present a monolithic stacked FET architecture featuring a stepped channel structure where the bottom FET channels are wider than the top. Such a design relieves high aspect ratio process challenges by reducing the total stack height and provides better performance as …

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Vertical-Transport Nanosheet Technology for CMOS Scaling beyond Lateral-Transport Devices

Harirajkumar Jagannathan, Brett D. Anderson, C-W. Sohn, G. Tsutsui et autres

We demonstrate, for the first time, Vertical-Transport Nanosheet (VTFET) CMOS logic transistors at sub-45nm gate pitch on bulk silicon wafers. We show that VTFETs present an opportunity to break the Contacted Gate Pitch (CGP) barrier faced by Lateral-Transport FETs. VTFETs offer scaling …

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Test vehicle options for ceramic surface mount arrays

Uzma Ahmad, C. Osborn, Marie S. Cole

We discuss the test vehicle options for the ceramic surface mount technologies. IBM Microelectronics offers a complete technology solution. Ceramic test vehicles are available in both white and dark alumina (9211) formulations. The module and technology options are described. This paper discusses …

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The sea as a conductor

C. Osborn

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