2025
conference-paper
OpenAlex
S. Mochizuki, S. Kumar, Andrew Greene, K. Killic et autres
Stacked Gate-All-Around (GAA) nanosheet p-type Field Effect Transistors (FETs) incorporating Si1-xGexchannel have been successfully fabricated on scaled devices to investigate their electrical performance for next-generation logic applications. The Si1-xGexNS channels demonstrate high crystalline quality and substantial compressive stress (0.6-0.9 Gpa), enabling enhanced …
us
(code pays fourni par la source)
2024
conference-paper
OpenAlex
Chen Zhang, Jay W. Strane, Lijuan Zou, Suin Yun et autres
We present a monolithic stacked FET architecture featuring a stepped channel structure where the bottom FET channels are wider than the top. Such a design relieves high aspect ratio process challenges by reducing the total stack height and provides better performance as …
us
(code pays fourni par la source)
2024
conference-paper
OpenAlex
James J. Demarest, Brad Austin, Lukas Tierney, Z. Martin
Abstract In the ever-increasing complexity of today’s state-of-the-art semiconductor structures, it is desirable to seek any advantage in the fault isolation and analysis paradigm to improve time to data. This paper discusses one such improvement where it is shown to be possible …
us
(code pays fourni par la source)
2024
conference-paper
OpenAlex
Zachary Gardner, Soon‐Cheon Seo, Pijeng Khor, Chris Waskiewicz et autres
This paper addresses the key challenges of copper (Cu) undercut control using the end point detection (EPD) system based on the Applied Materials Raider tool. The Cu etch rate was measured with the timed etch to validate the end point detection on …
us
(code pays fourni par la source)
2023
conference-paper
OpenAlex
S.C. Fan, Paul C. Jamison, Shanti Pancharatnam, Muthumanickam Sankarapandian et autres
Middle of Line (MOL) metallization with cobalt has been very promising to reduce the parasitic resistance of advanced CMOS devices. Though significant line resistance reduction has been demonstrated, there are still many challenges in cobalt MOL integration especially for yield improvement. In …
us
(code pays fourni par la source)
2021
conference-paper
OpenAlex
Harirajkumar Jagannathan, Brett D. Anderson, C-W. Sohn, G. Tsutsui et autres
We demonstrate, for the first time, Vertical-Transport Nanosheet (VTFET) CMOS logic transistors at sub-45nm gate pitch on bulk silicon wafers. We show that VTFETs present an opportunity to break the Contacted Gate Pitch (CGP) barrier faced by Lateral-Transport FETs. VTFETs offer scaling …
us, kr
(code pays fourni par la source)
2021
conference-paper
OpenAlex
Jingtao Li, Kevin W. Brew, K. Cheng, V. Chan et autres
Abstract In this work, we investigate mushroom type phase-change material (PCM) memory cells based on Ge2Sb2Te5. We use low-angle annular dark field (LAADF) STEM imaging and energy dispersive X-ray spectroscopy (EDX) to study changes in microstructure and elemental distributions in the PCM …
us
(code pays fourni par la source)
2021
conference-paper
OpenAlex
James J. Demarest, Nicole D Arnold, Kevin W. Brew, V. Chan et autres
Abstract There are several variants of artificial intelligence (AI) hardware structures that are under study by the semiconductor industry for potential use in complementary metal–oxide–semiconductor (CMOS) designs. This paper discusses some of the failure analysis challenges that have appeared in discrete test …
us
(code pays fourni par la source)
Accès ouvert
2021
article
OpenAlex
Pritish Narayanan, Stefano Ambrogio, Atsuya Okazaki, Kohji Hosokawa et autres
Hardware acceleration of deep learning using analog non-volatile memory (NVM) requires large arrays with high device yield, high accuracy Multiply-ACcumulate (MAC) operations, and routing frameworks for implementing arbitrary deep neural network (DNN) topologies. In this article, we present a 14-nm test-chip for …
us, jp, ch
(code pays fourni par la source)
2021
conference-paper
OpenAlex
Son V. Nguyen, Hosadurga k Shobha, C. B. Peethala, Thomas J Haigh et autres
AlOx was selectively deposited on top of SiCOH in 32 nm pitch Cu-SiCOH pattern to form a Fully Aligned Via (FAV) test structure. Selective deposition process performance and its integration into the 5nm BEOL FAV structure were evaluated. The selective AlOx deposition …
us
(code pays fourni par la source)
2021
conference-paper
OpenAlex
Devika Sil, Yasir Sulehria, O. Gluschenkov, Tomotaka Nogami et autres
A novel nanosecond (ns) laser anneal (multiple laser shots at sub-melting low laser energy) was employed to reduce the blanket sheet resistance of Ru thin films deposited by physical vapor deposition (PVD). The laser anneal was conducted after PVD Ru deposition and …
us, fr
(code pays fourni par la source)
2020
conference-paper
OpenAlex
Daniel C. Edelstein, Michael Rizzolo, Devika Sil, A. Dutta et autres
We present the first Embedded Spin-Transfer-Torque MRAM (eMRAM) technology in a 14 nm CMOS node. A novel integration supports the highest eMRAM density (0.0273 um2 cell size), optimal magnetic tunnel junction (MTJ) placement between M1-M2 for performance and density, and the lowest-cost …
us
(code pays fourni par la source)