200-mm SiC Power Device Technology Platform enabled by Process and Integration Innovations

Le résumé fourni par la source

This invited paper addresses the key technical challenges in developing high-performance and reliable SiC power devices—from epitaxy to packaging and reliability. Key innovation opportunities in SiC power device platform technologies are highlighted. Critical unit process modules are discussed, including (1) a high-growth-rate (⩾50 µm/hr) 200-mm 4H-SiC epitaxy process with tight doping control (⩽2%), thickness uniformity (⩽1%), and low defect density (⩽0.4 cm⁻2), (2) room-temperature implantation enabled by channeling, (3) low-interface-trap-density Dit(~5×1010eV⁻1•cm⁻2) gate stack formation with improved threshold-voltage stability, and (4) low-thermal-budget (⩽ 900 °C) Ohmic contacts achieving low specific contact resistance (~10⁻⁵ Ω•cm2). By integrating these process innovations, we realize 1.2-kV planar and trench SiC MOSFETs with channel mobilities of ~26 and ~30 cm2/V•s, respectively.

Ce résumé expose les affirmations des auteurs. BNTIC ne l’interprète pas comme une validation indépendante des résultats.