Characterization of Chip-to-Wafer Interconnects with Thick Gold Finish for Fan-Out Wafer-Level Packaging RDL-First Integration

Résumé fourni par la source

This study aims at addressing thick Au (several micrometers) finished chips assembly on a wafer featuring redistribution lines (RDL) as part of Fan-Out Wafer-Level Packaging (FOWLP) RDL-first integration with$75 \mu \mathrm{m}$diameter bumps and$150 \mu \mathrm{m}$pitch which are typical dimensions for RF applications. Different chip to wafer assembly configurations have been assessed: four classic configurations involve Cu and/or Ni as underlayer in contact with SnAg solder; three configurations involve$5 \mu \mathrm{m}$Au on top chips to mimic GaN or GaAs typical finish, with assembly based on Sn soldering or Ag glue bonding to Au stud bump. To assess assembly solutions for thick Au finished chips and compare them to classic solutions, all assembly configurations have been electrically, mechanically and morphologically characterized before and after high temperature storage (HTS) at 150° C for 1000 h. Assembly configurations involving thick Au with SnAg (or SAC305) soldering suffer from$\text{AuSn}_{4}$intermetallic compound (IMC) growth through the solder volume, which results in a bump with a hole in center. Despite this uncommon feature, the bump electrical yield reaches 100 % with mean resistance only 50 % higher than in the case of classic configurations. Nevertheless, this solution underperforms after HTS with significant resistance increase, as well as poorer shear strength. On the other hand, adding Au stud bump on chip Au pad and bonding it to wafer Au pad through Ag glue proves to have 15 to 30 times larger electrical resistance than Sn-based soldering before HTS. Moreover, the processes involved in this study require further development to ensure narrow electrical resistance distribution and a proper underfilling process. In conclusion, chips with thick Au pad finish can be assembled on wafers using common SnAg solder for proof-of-concept purposes, without reliability target. However, the recommendation would be to add a classic$\text{Cu} / \text{Ni} / \text{SnAg}$finish on top of thick Au pads in order to ensure proper IMC growth mainly at top and bottom bump interfaces.

Ce résumé expose les affirmations des auteurs. BNTIC ne l’interprète pas comme une validation indépendante des résultats.