Thermal Characterization of HBMs Integrated via Hybrid Bonding

Le résumé fourni par la source

HBM increases its bandwidth and capacity by two-to three-fold with each generation within a constrained footprint. Further development of HBM can be enabled by hybrid bonding (HB) technology, which connects and vertically stacks memory chips with high precision to optimize density, performance, and energy efficiency. Along with the higher level of integration, HBM4 and beyond have higher power density, necessitating efficient thermal management. The integration process has a great effect on the thermal resistance of HBM. This study reports two hybrid bonding process flows, double side fabrication (DSF) and inter-die gap filling (IDGF). In the DSF flow, HB pads are fabricated on both sides of the chips before stacking. In contrast, the IDGF flow involves fabricating HB pads on one side of the chips first, followed by stacking the chips and then fabricating HB pads on the opposite side. This process is repeated for each subsequent stacking layer. Thermal performance of HBMs integrated through these two process flows are analyzed and compared. The results show that the IDGF flow achieves exceptionally low thermal resistance. In addition, within the same stack thickness, IDGF flow can stack more chips as it is free of molding and has thinner chips. This study can provide valuable insights into future HBM development.

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