Development of integrated heterostructures on silicon by MBE

Le résumé fourni par la source

The semiconductor industry is facing the challenge of scaling of the gate dielectric of Si CMOS devices, which are continually being made smaller. Presently SiO/sub 2/ is being used, but at thickness below 20/spl Aring/, it suffers from high tunneling leakage current and reliability problems. Alternative high-k materials to replace SiO/sub 2/ need to be developed as soon as possible. The alkaline earth oxides such as barium strontium titanate (Ba/sub x/Sr/sub 1-x/TiO/sub 3/) have a substantially higher dielectric constant and are ideal candidates for gate dielectrics. Because of the higher dielectric constant a physically thicker layer can yield an equivalent oxide thickness of <20/spl Aring/, thereby eliminating the leakage problems experienced with ultra-thin SiO/sub 2/. These oxides also exhibit ferroelectric behavior and their use as the gate dielectric on Si can be exploited in the realization of a single transistor memory element. These types of oxides also have a number of functionalities which when combined with other types of semiconductors will enable the development of novel device applications. Molecular beam epitaxy can be used for the deposition of oxide based epitaxial layers both for Si device applications and integration of GaAs devices with silicon. The potential for increased functionality and integration of devices based on III-V semiconductors, crystalline oxides and silicon make this an attractive and promising technology.

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