Se Jong Rhee

A Novel Approach in Separating the Roles of Electrons and Holes in Causing Degradation in Hf-Based MOSFET Devices by Using Stress-Anneal Technique

M.S. Akbar, Changhwan Choi, Se Jong Rhee, Sitaraman Krishnan et autres

A novel stress-anneal approach has been investigated to separate the role of electrons and hole charge trappings in Hf-based gate oxides. It is observed that heat treatment following a stress experiments on Hf-based MOSFET can effectively eliminate electron trapping in the oxide. …

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Mechanism of improved channel carrier mobility for stacked Y2O3∕HfO2 gate dielectric

Feng Jun Zhu, Chang Yong Kang, Se Jong Rhee, Chang‐Hwan Choi et autres

Stacked Y2O3∕HfO2 gate dielectric, compared to HfO2, shows significantly enhanced electron channel mobility at different temperatures. This mobility improvement can be attributed to reduced remote phonon scattering, which is associated with the smaller ionic polarization of Y2O3, and the suppressed Coulomb scattering …

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Structural advantage for the EOT scaling and improved electron channel mobility by incorporating dysprosium oxide (Dy/sub 2/O/sub 3/) into HfO/sub 2/ n-MOSFETs

Tackhwi Lee, Se Jong Rhee, Chang Yong Kang, Feng Jun Zhu et autres

A structural approach of fabricating laminated Dy2O3-incorporated HfO2multimetal oxide dielectric has been developed for high-performance CMOS applications. Top Dy2O3laminated HfO2bilayer structure shows the thinnest equivalent oxide thickness (EOT) with a reduced leakage current compared to HfO2. This structure shows a great advantage …

Improved MOSFET characteristics by Incorporating Laminated Dysprosium (Dy2O3) Dielectric into HfO2 Gate Stack

Tackhwi Lee, Se Jong Rhee, Kang Chang, Feng Jun Zhu et autres

New structural approach of Dy2O3 incorporated HfO2 multi-metal oxide n-MOSFETs and their electrical characterization are investigated for the first time. Top Dy2O3 laminated HfO2 bi-layer structure shows the thinnest EOT with reduced leakage current compared to control HfO2. Improved electrical characteristics such …

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Low work-function TaN-metal gate with Gadolinium oxide buffer layer on Hf-based dielectrics

Gaurav Thareja, Se Jong Rhee, Huang-Chun Wen, Rusty Harris et autres

Reduction in effective work function (EWF) of mid gap-TaN metal gate electrode with Gadolinium (Gd2O3) buffer layer in Hafnium based high-K gate stack has been demonstrated. EWF of 4.2eV was achieved for TaN with a bi-layer arrangement of Gd2O3/HfSiOx dielectric. By using …

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Investigation of transient relaxation under static and dynamic stress in Hf-based gate oxides

M.S. Akbar, Changhwan Choi, Se Jong Rhee, Sitaraman Krishnan et autres

Transient relaxation, which has been addressed as an undesirable issue in high-k alternate gate dielectrics, has been studied systematically. In Hf-based dielectrics, it follows a universal line irrespective of stress times and stress voltages if stressed (static/dynamic) up to certain limits. The …

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Systematic analysis of silicon oxynitride interfacial layer and its effects on electrical characteristics of high-k HfO2 transistor

Se Jong Rhee, Feng Jun Zhu, Hyoung-Sub Kim, Chang Yong Kang et autres

High-k hafnium oxide dielectric metal-oxide-semiconductor field-effect transistors with several physical thicknesses of silicon oxynitride interfacial layers were investigated to understand the relationship of their effects to electrical properties. Both flatband voltage and threshold voltage were negatively shifted with reduction of leakage current …

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Hafnium Titanate bilayer structure multimetal dielectric nMOSCAPs

Se Jong Rhee, Feng Jun Zhu, Hyoung-Sub Kim, Chang‐Hwan Choi et autres

A novel approach of fabricating laminated TiO/sub 2//HfO/sub 2/ bilayer multimetal oxide dielectric has been developed for high-performance CMOS applications. Ultrathin equivalent oxide thickness (/spl sim/8 /spl Aring/) has been achieved with increased effective permittivity (k/spl sim/36). Hysteresis was significantly reduced using …

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Metal gate-HfO/sub 2/ MOS structures on GaAs substrate with and without Si interlayer

Kang Min Ok, Hyoung-sub Kim, Manhong Zhang, Chang-Yong Kang et autres

In this letter, we studied the effects of post-deposition anneal (PDA) time and Si interface control layer (ICL) on the electrical characteristics of the MOS capacitor with high-/spl kappa/ (HfO/sub 2/) material on GaAs. Thin equivalent oxide thickness (EOT<3 nm) with excellent …

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A 45 nm CMOS node Cu/Low-k/ Ultra Low-k PECVD SiCOH (k=2.4) BEOL Technology

S. Sankaran, S. Arai, R. A. Augur, Mattias Beck et autres

A high performance 45nm BEOL technology with proven reliability is presented. This BEOL has a hierarchical architecture with up to 10 wiring levels with 5 in PECVD SiCOH (k=3.0), and 3 in a newly-developed advanced PECVD ultralow-k (ULK) porous SiCOH (k=2.4). Led …

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Improving carrier mobility and reliability characteristics of high-k NMOSFET by using stacked Y2O3/HfO2 gate dielectric

Feng Jun Zhu, Chang Yong Kang, Se Jong Rhee, Chang‐Hwan Choi et autres

To overcome the issues of mobility degradation and charge trapping in the high-k MOSFET, a stacked Y2O3(top)/HfO2(bottom) multi-metal gate dielectric with TaN gate has been developed. Compared to the HfO2reference, the new dielectric shows similar scalability, but superior device performance and reliability …

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Improving channel carrier mobility and immunity to charge trapping of high-K NMOSFET by using stacked Y/sub 2/O/sub 3//HfO/sub 2/ gate dielectric

Feng Jun Zhu, Se Jong Rhee, Chang Yong Kang, Chang‐Hwan Choi et autres

A stacked Y/sub 2/O/sub 3//HfO/sub 2/ multimetal gate dielectric with improved electron mobility and charge trapping characteristics is reported. Laminated hafnium and yttrium were sputtered on silicon followed by post-deposition anneal (PDA) in N/sub 2/ ambient. The new dielectric shows a similar …

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