2025
conference-paper
OpenAlex
Yuri Stepchenkov, Yuri Diachenko, Dmitri V. Khilko
Self-timed (ST) digital circuits, which constitute a subclass of asynchronous circuits, have a number of advantages over synchronous and asynchronous counterparts. Due to the two-phase discipline, redundant data encoding and mandatory acknowledging of successful switching completion in each operation phase, ST circuits …
ru
(code pays fourni par la source)
2024
conference-paper
OpenAlex
Yuri Diachenko, Yuri Stepchenkov, Dmitri V. Khilko
Self-timed (ST) circuits have higher reliability in comparison with synchronous counterparts and can serve as a promising circuitry basis for microelectronic control unit implementations for robotic complexes and production systems. However, designing ST circuits is more labor-intensive and non-trivial because of the …
ru
(code pays fourni par la source)
2024
conference-paper
OpenAlex
Yuri Stepchenkov, Yuri Diachenko, Dmitri V. Khilko, Николай Викторович Морозов et autres
The article analyzes the correct implementation problem for self-timed latches and flip-flops with a composite write-enable input. Latch and flip-flop circuit implementation cases are described depending on the type of self-timed coding of input signals. A software tool verifying digital circuits on …
ru
(code pays fourni par la source)