Tousif Rahman

A Real-Time Tsetlin Machine-based Non-intrusive Load Monitoring System on MCUs

Han Wu, Tianhang Tan, Shengyu Duan, Alex Yakovlev et autres

Non-Intrusive Load Monitoring (NILM) systems estimate individual appliance energy consumption from a single aggregate meter, without requiring separate sensors for each device. By installing a single meter that measures a building's total electricity consumption, NILM algorithms can determine the active status of …

TinyML: Applications, Algorithms, Co-design and Implementations

Omar Ghazal, Tousif Rahman, Rishad Shafik

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Learning dynamics, pattern recognition capability and interpretability of the Tsetlin Machine

Olga Tarasyuk, Anatoliy Gorbenko, Tousif Rahman, Lei Jiao et autres

The inability to trace an AI’s reasoning process and understand why it makes each decision is known as the black box problem. This remains one of the major barriers to the trusted and widespread use of machine learning in many application domains. …

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TMAtlas: An Interactive Visual Analytics Framework for Explaining Tsetlin Machine Outputs

Bob Pattison, Tousif Rahman, Alex Chan, Ekin Can Erkuş et autres

The Tsetlin Machine (TM) is an emerging machine learning (ML) model that learns patterns in data via human-interpretable logical clauses defined over Boolean inputs. While its clause-based structure offers intrinsic transparency, deriving actionable insights remains challenging. The Booleanization of raw input data …

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Runtime Tunable Tsetlin Machines for Edge Inference on eFPGAs

Tousif Rahman, Gang Mao, Bob Pattison, Sidharth Maheshwari et autres

Embedded Field-Programmable Gate Arrays (eFP-GAs) enable Machine Learning (ML) hardware accelerators to meet the latency and lower power needs of IoT-sensor-based applications when compared to traditional FPGAs. However, limited logic and memory constrain compute capabilities and model size. Unlike recent FPGA approaches …

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Dynamic Tsetlin Machine Accelerators for On-Chip Training Using FPGAs

Gang Mao, Tousif Rahman, Sidharth Maheshwari, Bob Pattison et autres

The increased demand for data privacy and security in machine learning (ML) applications has put impetus on effective edge training on Internet-of-Things (IoT) nodes. Edge training aims to leverage speed, energy efficiency and adaptability within the resource constraints of the nodes. Deploying …

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Dynamic Tsetlin Machine Accelerators for On-Chip Training at the Edge using FPGAs

Gang Mao, Tousif Rahman, Sidharth Maheshwari, Bob Pattison et autres

The increased demand for data privacy and security in machine learning (ML) applications has put impetus on effective edge training on Internet-of-Things (IoT) nodes. Edge training aims to leverage speed, energy efficiency and adaptability within the resource constraints of the nodes. Deploying …

Runtime Tunable Tsetlin Machines for Edge Inference on eFPGAs

Tousif Rahman, Gang Mao, Bob Pattison, Sidharth Maheshwari et autres

Embedded Field-Programmable Gate Arrays (eFPGAs) allow for the design of hardware accelerators of edge Machine Learning (ML) applications at a lower power budget compared with traditional FPGA platforms. However, the limited eFPGA logic and memory significantly constrain compute capabilities and model size. …

Exploring Internal Learning Dynamics, Pattern Recognition Capability and Interpretability of the Tsetlin Machine

Olga Tarasyuk, Anatoliy Gorbenko, Tousif Rahman, Lei Jiao et autres

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MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications

Tousif Rahman, Gang Mao, Sidharth Maheshwari, Rishad Shafik et autres

System-on-Chip Field-Programmable Gate Arrays (SoC-FPGAs) offer significant throughput gains for machine learning (ML) edge inference applications via the design of co-processor accelerator systems. However, the design effort for training and translating ML models into SoC-FPGA solutions can be substantial and requires specialist …

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MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications

Tousif Rahman, Gang Mao, Sidharth Maheshwari, Rishad Shafik et autres

System-on-Chip Field-Programmable Gate Arrays (SoC-FPGAs) offer significant throughput gains for machine learning (ML) edge inference applications via the design of co-processor accelerator systems. However, the design effort for training and translating ML models into SoC-FPGA solutions can be substantial and requires specialist …

Logic-Based Machine Learning with Reproducible Decision Model Using the Tsetlin Machine

Olga Tarasyuk, Anatoliy Gorbenko, Tousif Rahman, Rishad Shafik et autres

Tsetlin Machine (TM) is a recent automaton-based algorithm for reinforcement learning. It has demonstrated competitive accuracy on many popular benchmarks while providing a natural interpretability. Due to its logically underpinning it is amenable to hardware implementation with faster performance and higher energy …

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