Machine Learning-Based Optimization of Boosted Voltage in 3T Gain Cell eDRAM

Le résumé fourni par la source

This study investigates the impact of boosted read wordline voltage ($V_{\text {RWL }}$) on the read bitline (RBL) voltage swing ($\Delta V_{\text{RBL}}$) and read energy consumption in a 3T gaincell eDRAM implemented in a 65 nm CMOS process. Circuitlevel HSPICE simulations were performed by sweeping$V_{\text{RWL}}$under representative PVT conditions to evaluate the RBL discharge behavior and read efficiency. Increasing$V_{\text {RWL }}$enhances the access-transistor overdrive, thereby increasing$\Delta V_{\text{RBL}}$and improving the sensing margin; however, beyond approximately 1.2 V, the discharge improvement begins to saturate while the read energy rises nonlinearly, revealing a clear performanceefficiency trade-off. To quantitatively capture this relationship, a Gaussian Process Regression (GPR)-based machine learning (ML) model was trained using 1,000 simulation samples to predict$\Delta V_{\text{RBL}}$and read energy as functions of$V_{\text{RWL}}$. The proposed model achieved mean absolute errors (MAE) of$1.386 \times 10^{-4} ~\mathrm{V}$for$\Delta V_{\text{RbL}}$and$3.27 \times 10^{-19} ~\mathrm{J} /$bit for energy. Furthermore, an ML-driven weighted-sum optimization identified an optimal boosted voltage around$V_{\text{RWL}} \approx 1.18 ~\mathrm{V}$, yielding a predicted$\Delta V_{\text {RBL }}$of 0.596 V and energy consumption of$0.33 \text{fJ} /$bit. These results demonstrate that the proposed ML-based prediction and optimization framework provides an effective, data-driven voltage design strategy for high-performance gain-cell eDRAMs requiring both fast operation and low power consumption.

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