Reconfigurable Floating Gate Memristors for High-Accuracy Neuromorphic Computing

Le résumé fourni par la source

The explosive growth of computational data poses significant challenges to conventional von Neumann architectures and network processing capabilities. Two-dimensional floating gate memristors, with their compact footprint, high storage density, prolonged data retention, and rapid programming speeds, are emerging as ideal candidates for neuromorphic computing systems that integrate memory and computation. However, achieving full hardware implementation of deep neural networks necessitates the emulation of nonlinear activation functions. Here, we present a reconfigurable floating gate memristor (FGM) based on a MoS 2 /hBN/graphene heterostructure. The device demonstrates exceptional performance, including no significant changes in conductive states over a 3600 s test period and 66 linearly tunable conductance states, alongside multilevel conductance tunability under optical pulses. Distinct from traditional research focused solely on synaptic weight updates, we demonstrate an innovative reconfigurable “dual-function hardware unit.” By strictly controlling back gate voltages below the threshold voltage ( V th ), we successfully emulate both rectified linear unit (ReLU) and leaky rectified linear unit (Leaky ReLU) behaviors in floating gate and half-floating gate devices, respectively. Integrated into LeNet and AlexNet architectures, the FGM-enabled systems achieve markedly higher inference accuracy compared to activation-free models in classification tasks on the FashionMNIST and 43-class traffic sign data sets. This device simultaneously functions as a tunable synaptic weight and a native nonlinear activation function, thereby opening up the possibility of fully hardware-implemented neuromorphic systems.

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