Thermal Aware Design Methodologies for System On Chip Application Processor

Le résumé fourni par la source

In the semiconductor industry, there has been a continuous process technology scaling. This enables more logic into the limited space and more chips from a same sized wafer. All electrical power consumed by the chip is converted into heat, and the on-chip temperature depends on the thermal design of the chip itself. Heat causes more leakage currents inside the components of semiconductors. Although the required operational power remains constant, the resulting heat leads to additional consumption of temperature-dependent leakage power. An increase in leakage power generates further heat, leading to negative feedback whereby increased temperatures cause additional leakage power, potentially causing runaway heating without proper thermal control. Therefore, managing temperature is critical in semiconductor chips, especially in mobile semiconductors which have restricted cooling environments. While package structures aim to remove internal hot spots within the chip, optimal design optimization concerning thermal coupling-induced hotspots is essential from the chip-design perspective. This paper discusses studies conducted from a thermal engineering standpoint aimed at achieving optimized cooling designs for environments containing multiple functional blocks integrated onto one chip, similar to mobile System-On-Chip Application Processors (SOC AP).

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