Dynamic Modeling of Parametric Shifts in FinFETs Under Hot Carrier Degradations

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This work analyzes the impact of hot carrier degradation (HCD) on the full-IV electrical characteristics of FinFETs and develops a dynamic model. Data analysis shows that shifts in the subthreshold swing (SS), the transconductance (${G}_{m}\text {)}$, and drain-induced barrier lowering (DIBL), besides the threshold voltage (${V}_{\text {TH}}\text {)}$and theon-state current (${I}_{\text {on}}\text {)}$, are presented in FinFETs due to HCD. Correspondingly, four parameters of the FinFET model BSIM-CMG are identified and reformulated with an explicit workload and temporal dependence. An automatic parameter extraction flow with the particle swarm optimization (PSO) algorithm is further developed for an efficient parameterization of the continuous-time model. This aging model is applied to the 16/14- and 7-nm FinFET HCD silicon data, showing its validity in reproducing the full-IV aging characteristics, beyond the${V}_{\text {TH}}$-only model. With the dynamic time evolution method (DTEM) to convert it into a discrete-time formulation, the temporal HCD model is implemented into the SPICE simulator through a model interface. Circuit simulations show that the developed dynamic model outperforms the local HCD model in predicting the figure-of-merits, such as SRAM performance and power.

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