Thermal Performance Evaluation of Single-Phase Immersion Cooling for High-Power (> 1kW) AI Processor

Le résumé fourni par la source

AI processors with a 2.5D package combining Logic and HBM, and a Thermal Design Power exceeding 1 kW, are being introduced to handle the vast amounts of data required for AI learning. Single-phase immersion cooling has gained attention as a cooling solution for these high-power AI processors. However, existing studies evaluating the cooling performance of Singlephase immersion cooling have primarily focused on Single Chip Packages with Logic only and a TDP below 1 kW. In the case of 2.5 D packages with Logic and HBM, additional research is needed to manage the thermal coupling between the high-power Logic and HBM, while also ensuring that the HBM’s thermal limit, which is approximately $30^{\circ} \mathrm{C}$ lower than that of Logic, is maintained. In this study, the cooling capability of Single-phase immersion cooling for a 2.5D package with a TDP exceeding 1 kW is verified through simulations while meeting the temperature limits of both Logic and HBM. A simulation model is developed with a heat sink placed on a 2.5D SiP containing two Logic dies surrounded by twelve HBM dies, all within a 1 U server. After evaluating the thermal performance of various heatsinks and heat spreaders, it is found that metal heatsinks and heat spreaders could not meet the temperature limits affected by the ASIC and HBM. While using a vapor chamber satisfied the ASIC’s temperature limit, thermal coupling prevented the HBM from staying within its temperature limit. Therefore, a new vapor chamber structure is proposed to resolve the thermal coupling issue between the ASIC and HBM, ensuring that both the ASIC and HBM meet their temperature limits. The optimal heatsink is selected, and ultimately, this new structure reduced the thermal coupling effect by $\mathbf{1 5. 5 \%}$ for ASIC and 23.6% for HBM compared to the previous design, allowing both the ASIC and HBM to operate below their temperature limits. And, it is confirmed that the system could effectively cool both the ASIC at 850 W and the HBM at 432 W, total 1282 W, while meeting the temperature limits of both components.

Ce résumé expose les affirmations des auteurs. BNTIC ne l’interprète pas comme une validation indépendante des résultats.