Aller au contenu principal
Accès ouvert déclaré 2026 article

A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA

1Citations signalées, ce qui n’est pas une note de qualité
2Institutions déclarées
1Pays d’affiliation déclarés

Rattachement africain : hk. Niveau de preuve : code pays fourni par la source.

Le résumé fourni par la source

Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications. Most recently, foundation AI models for circuits have emerged as a new technology trend. Unlike traditional task-specific AI solutions, these new AI models are developed through two stages: 1) self-supervised pre-training on a large amount of unlabeled data to learn intrinsic circuit properties; and 2) efficient fine-tuning for specific downstream applications, such as early-stage design quality evaluation, circuit-related context generation, and functional verification. This new paradigm brings many advantages: model generalization, less reliance on labeled circuit data, efficient adaptation to new tasks, and unprecedented generative capability. In this paper, we propose referring to AI models developed with this new paradigm as circuit foundation models (CFMs) . This paper provides a comprehensive survey of the latest progress in circuit foundation models, unprecedentedly covering over 160 relevant works. Over 90% of our introduced works were published in or after 2022, indicating that this emerging research trend has attracted wide attention in a short period. In this survey, we propose to categorize all existing circuit foundation models into two primary types: 1) encoder-based methods performing general circuit representation learning for predictive tasks ; and 2) decoder-based methods leveraging large language models (LLMs) for generative tasks . For our introduced works, we cover their input modalities, model architecture, pre-training strategies, domain adaptation techniques, and downstream design applications. In addition, this paper discussed the unique properties of circuits from the data perspective. These circuit properties have motivated many works in this domain and differentiated them from general AI techniques. Finally, we shared our observed challenges and potential future research directions about developing foundation AI models for EDA methodologies.

Ce résumé expose les affirmations des auteurs. BNTIC ne l’interprète pas comme une validation indépendante des résultats.

Le contrôle bibliographique ouvert

DOI retrouvé dans Crossref DOI retrouvé ; titre concordant.

Titre Crossref
A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA
Date Crossref
02/07/2026
Éditeur
Association for Computing Machinery (ACM)
Type
journal-article

Ce recoupement confirme des métadonnées liées au DOI. Il ne confirme ni la méthode ni les conclusions de l’étude, et il ne compte pas comme une seconde source scientifique indépendante.

Où se fait cette recherche

  • Hong Kong University of Science and Technology ECE pays non établi dans la notice
    Université ou école supérieure
  • University of Hong Kong pays non établi dans la notice
    Université ou école supérieure

ECE — Hong Kong University of Science and Technology et University of Hong Kong.

Une affiliation ne permet pas de déduire la nationalité d’un auteur.

Les sujets associés

VLSI and FPGA Design TechniquesLow-power high-performance VLSI designPhysical Unclonable Functions (PUFs) and Hardware Security

BNTIC News n’est pas le producteur de ces données. Les publications sont interrogées à la demande dans Crossref, OpenAIRE, DOAJ, Europe PMC, HAL, DataCite, AfricArXiv, ROR et la Banque mondiale, sans clé d’accès. OpenAlex reste optionnel. Aucun service payant n’est nécessaire et aucune donnée externe n’est enregistrée en base. Consulter les sources et leurs limites.