Leveraging Automation of TEM Sample Preparation for Increased Throughput and Reproducible Results from Advanced Multimodal STEM Analysis of 3-nm FinFET Transistors

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Abstract TEM sample preparation is increasingly challenging for advanced semiconductor nodes due to complex architectures and shrinking dimensions. In this work we present an AI-driven automation package on the FIB-SEM which enables fully automated in-trench preparation, lift-out, and low-keV cleaning down to sub-100 nm sample thickness. We demonstrate its results on TSMC 3-nm FinFET and Ti alloy samples. The workflow produced four high-quality lamellae, with STEM and EDS revealing detailed FinFET architecture and material composition, including titanium-filled gates and ruthenium layers. Batch testing on silicon trenches achieved a 96% success rate. Automation reduced operator time by ~40% and supports overnight system use, increasing throughput without compromising specimen quality.

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