Low-Power Highly-Integrated 4-RX 2-TX Multi-Channel Cascadable D-Band Transceiver for MIMO FMCW Radar Applications in BiCMOS

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This paper presents a low-power, highly-integrated D-Band transceiver chip realized in a 90 nm SiGe BiCMOS technology. The high integration level includes four receiver (RX) channels, two transmitter (TX) channels, local oscillator (LO) signal generation and LO distribution network, frequency dividers and serial peripheral interface (SPI) for digital reconfigurability. Additionally, the chip enables cascadability, it can provide the LO signal to other radar units (primary mode) or receive an LO signal from another unit (secondary mode). At 137 GHz, the RX front-end achieves a peak gain of 14 dB, while the transmitter exhibits an output power of 4.7 dBm. A push-push Colpitts topology with metal fuse-based post-fabrication tuning is employed for the VCO, enabling an additional frequency range extension of 4 GHz. The transmitter output frequency is continuously tunable from$125-155 \text{GHz}$, with a measured phase noise of$-92.2 \text{dBc} / \text{Hz}$at 1 MHz offset. The entire$4-\text{RX} 2-\text{TX}$transceiver consumes 360 mW in primary mode or 265 mW in secondary mode, respectively. A single RX channel draws 12 mA, while a single$\mathbf{T X}$consumes 33 mA. The circuit including pads occupies a chip area of only$3.5 ~\text{mm} \times 3.0 ~\text{mm}$, which is limited by the spacing necessary for isolation between the channels. The transceiver provides a competitive performance, temperature reliability and supports cascadability of radar units to construct a larger MIMO array. Hence, it is suitable for commercial FMCW radar applications around 140 GHz.

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