A 2-Transistor-1-Modulator (2T1m) Electronic-Photonic Hybrid Memory Architecture for Deep Neural Network Cim and Very Large-Scale Transformers

Le résumé fourni par la source

Compute in-memory (CIM) architecture offers the promise to address the data movement efficiency in data-abundant computing, especially for deep neural networks. However, their array scalability is inevitably limited by IR losses with increasing error accumulation due to the increasing wire resistance as arrays grow in size. In this work, we propose a two-transistor-one-modulator (2T1M) electro-optic memory array with an optical bitline (BL) that circumvents the BL IR loss and capacitive loading issue. In each cell, dotproducts, performed by FeFET memories operated in sub-threshold region, are summed through phase modulation of an optical signal. We apply an ultra-lowloss compact lithium niobate on insulator (LNOI) photonic modulator to realize the energy-efficient electro-optic translation. The photonic waveguide BL read-out is achieved through pairs of shared Mach-Zender Interferometers (MZI) to maximize column layout efficiency. By eliminating IR loss on the BL, we can enable up to 3750 kb array size and achieve up to 45 % inference accuracy improvement on a large-scale ALBERT transformer model compared to conventional CIM arrays.

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