A small area 11-bit SAR ADC for integrating pixel detectors at high repetition rate XFELs

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Abstract This paper presents an 11-bit successive approximation register (SAR) analog-to-digital converter (ADC) designed for high-performance integrating-type X-ray pixel detectors at X-ray Free Electron Laser (XFEL) facilities. The ADC employs a split capacitor array to reduce power consumption and chip area, making it suitable for large-scale integration within a pixel readout chip. The proposed ADC design enables the development of a new digital readout architecture capable of achieving both high frame rates and a wide dynamic range. The ADC was designed and implemented in a prototype chip using a 130 nm CMOS process. The core circuit occupies an area of 0.026 mm2. The measured effective number of bits (ENOB) achieves 10.36-bit with core circuit power consumption around 53 μW at 2 MS/s using a 1.2 V supply.

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