Timepix4, a large area pixel detector readout chip which can be tiled on 4 sides providing sub-200 ps timestamp binning
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Le résumé fourni par la source
Abstract Timepix4 is a 24.7 × 30.0 mm2 hybrid pixel detector readout ASIC which has been designed to permit detector tiling on 4 sides. It consists of 448 × 512 pixels which can be bump bonded to a sensor with square pixels at a pitch of 55 µm. Like its predecessor, Timepix3, it can operate in data driven mode sending out information (Time of Arrival, ToA and Time over Threshold, ToT) only when a pixel has a hit above a pre-defined and programmable threshold. In this mode hits can be tagged to a time bin of <200 ps and Timepix4 can record hits correctly at incoming rates of ∼3.6 MHz/mm2/s. In photon counting (or frame-based) mode it can count incoming hits at rates of up to 5 GHz/mm2/s. In both modes data is output via between 2 and 16 serializers each running at a programmable data bandwidth of between 40 Mbps and 10 Gbps. The specifications, architecture and circuit implementation are described along with first electrical measurements and measurements with radioactive sources. In photon counting mode X-ray images have been taken at a threshold of 650 e− (with <10 masked pixels). In data driven mode images were taken of ToA/ToT data using a 90Sr source at a threshold of 800 e− (with ∼120 masked pixels).
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Le contrôle bibliographique ouvert
DOI retrouvé dans Crossref DOI retrouvé ; titre concordant.
- Titre Crossref
- Timepix4, a large area pixel detector readout chip which can be tiled on 4 sides providing sub-200 ps timestamp binning
- Date Crossref
- 01/01/2022
- Éditeur
- IOP Publishing
- Type
- journal-article
Ce recoupement confirme des métadonnées liées au DOI. Il ne confirme ni la méthode ni les conclusions de l’étude, et il ne compte pas comme une seconde source scientifique indépendante.
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